SHIM Working Group Reconvenes to Enhance Specification
In 2015, the Multicore Association launched SHIM 1.0, the Software/Hardware Interface for Multicore/Manycore architectures. SHIM provides a common abstraction of the hardware properties that matter to multicore software tools. In other words, processor vendors who use SHIM don’t have to subject their customers to reading 1000-page manuals to comprehend the intricacies of their complex SoCs.
MCA members with experience in abstract hardware modeling have determined that the SHIM 2.0 should model state-of-the art processors, including heterogeneous functional units, pipelining effects, and SIMD. This capability will allow the description of complex DSPs, hardware accelerators, and soft cores – removing significant pain for the programmer. To integrate this capability, the working group will reconvene. Contact MCA for more information about SHIM and joining the working group.
Update on OpenAMP Progress
OpenAMP (Open Asymmetric Multi Processing Framework is a framework that manages systems with multiple operating systems and compute elements - allowing lifecycle control of heterogeneous cores in an SoC - boot, shut down, loading, and software execution.
In February 2016, the Multicore Association announced its formation of the OpenAMP working group. Recently, the working group has released OpenAMP 2016.10. New features include:
The MCAPI working group, with representatives from Airbus, NXP, PolyCore Software, Wind River and Xilinx, is collaborating towards an MCAPI 3 version. Focus areas for version 3.0 are:
Subsequent 3.x versions are planned to include additional application specific subsets with smaller footprints and enhancements in various functional areas and simplified support for bare metal implementations.
Prof. Sunita Chandrasekaran Wins 2016 IEEE-CS TCHPC Award
Prof. Sunita Chandrasekaran, Assistant Professor at the Department of Computer & Information Sciences, University of Delaware is a recipient of the prestigious 2016 IEEE-CS TCHPC Award for Excellence for Early Career Researchers in High Performance Computing. The award was given at the Supercomputing Conference, 2016. The Multicore Association (MCA) is excited to congratulate her on this accomplishment. Prof. Chandrasekaran has been a member of MCA over the past several years.
As a postdoctoral researcher at the University of Houston, along with graduate students and her mentor Dr. Barbara Chapman, Prof. Chandrasekaran created a high-level directive based software framework with an objective to ease the programming of heterogeneous multicore embedded systems. Prof. Chandrasekaran continued this project at the University of Delaware in collaboration with Siemens, Germany, to develop a software framework that can decompose an application into tasks and use the Multicore Task Management API (MTAPI) to create jobs and actions to assign workloads to the embedded processors.
The project software is available for download via Github: https://github.com/MCAPro2015
MCA Member PolyCore Software Updates Tools for the Intel SOC Cyclone V
PolyCore Software has updated its Poly-Platform/MCAPI for the Intel SOC Cyclone V. The update includes full MCAPI 2.0 support as well as the latest tools and BSPs for the SOC. Application support is provided for AMP and SMP operations on the ARM cores. For AMP, Linux and uC/OS are the OSes and for SMP it is Linux.
MCA Member Silexica Announces New Tools Utilizing SHIM
Silexica’s next generation SLX Tool Suite is shipping now. The SLX Tool Suite has been adopted to automate the distribution of code onto large, multicore platforms. Enhancements to the new version broaden the type and kinds of models, support C++, and improve ease-of-use and early risk analysis. The SLX Mapper and SLX Generator currently solve the software-mapping problem of figuring out and automating which portion of the software should run on which of the available cores. Some of this functionality will be incorporated into the Multicore Association’s SHIM 2.0 specification.
Benchmarks for Heterogeneous Compute
Although not directly related to MCA specifications, as a multicore enthusiast , you’ll be interested to learn about a benchmark in development by EEMBC for analyzing heterogeneous processor architectures for automotive vision, compute, and mobile imaging. The benchmark will help determine optimal load balancing of the compute tasks and distribution of data across multiple compute resources.
The working group has now developed the framework for the benchmark pipeline (using Gstreamer) and is looking at integrating this with OpenCL and the benchmark’s microkernels. An alpha version should be in place by Q1'2017. More information.
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