SHIM 2.0 Update – Multicore Association seeking reviewers on new specification.
It’s maybe been awhile since you last looked at the SHIM specification, let me start with a quick overview.
Version 1.0 of SHIM (Software/Hardware Interface for Multi- and ManyCore) came out in 2015. Unlike the IEEE IP-XACT standard which defines and describes electronic components, SHIM is an architecture description standard from the software design perspective. For example, some of the architectural features that can be (directly or indirectly) described are the processor cores, the inter-core communication channels, the memory system (including hierarchy, topology, coherency, memory size, latency), the network-on-chip (NoC) and routing protocol. SHIM supports vendor-specific, non-standard architectural information for customized tools.
After 2+ years of effort, the SHIM working group has produced SHIM 1.9 (waiting for your inputs before moving to 2.0!). The main features of SHIM2.0 are: introduction of power related properties to enable power consumption estimation, inter-connect contention description, custom instructions description, processor functional unit description, modular XML description, vendor extension and more - all to improve performance estimation accuracy for even complex multi-manycore processors, and better reuse of SHIM XML.
Are you interested in helping to review SHIM 1.9 and help us get to 2.0? Please send me email for more information.
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